cystech electronics corp. spec. no. : c709v8 issued date : 2012.08.20 revised date : 2012.08.23 page no. : 1/9 MTB09N03V8 cystek product specification n-channel logic level enhancement mode power mosfet MTB09N03V8 bv dss 30v i d 37.5a v gs =10v, i d =12a 6.8m r dson(typ) v gs =4.5v, i d =8a 13.1m description the MTB09N03V8 is a n-channel enhancement-mode mosfet, providing the designer with the best combination of fast switching, ruggedized device de sign, low on-resistance and cost effectiveness. features ? single drive requirement ? low on-resistance ? fast switching characteristic ? dynamic dv/dt rating ? repetitive avalanche rated ? pb-free lead plating and halogen-free package equivalent circuit outline MTB09N03V8 dfn3 3 pin 1 g gate d drain ssource ordering information device package shipping MTB09N03V8-0-t1-g dfn3 3 (pb-free lead plating an d halogen-free package) 3000 pcs / tape & reel
cystech electronics corp. spec. no. : c709v8 issued date : 2012.08.20 revised date : 2012.08.23 page no. : 2/9 MTB09N03V8 cystek product specification absolute maximum ratings (ta=25 c, unless otherwise specified) parameter symbol limits unit drain-source voltage v ds 30 gate-source voltage v gs 20 v continuous drain current @ v gs =10v, t c =25 c 37.5 continuous drain current @ v gs =10v, t c =100 c 23.7 continuous drain current @ v gs =10v, t a =25 c 13 continuous drain current @ v gs =10v, t a =100 c i d 8.2 pulsed drain current i dm 120 *1 avalanche current i as 14 a avalanche energy @ l=0.1mh, i d =14a, r g =25 e as 9.8 repetitive avalanche energy @ l=0.05mh e ar 4.9 *2 mj t a =25 2.5 *3 total power dissipation t a =100 p d 1.5 w operating junction and storage temp erature range tj, tstg -55~+150 c thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 6 c/w thermal resistance, junction-to-ambient, max r th,j-a 50 *3 c/w note : 1. pulse width limited by maximum junction temperature. 2. duty cycle 1%. 3. surface mounted on a 1 in2 pad of 2oz copper. in practice r th,j-a will be determined by customer?s pcb characteristics. characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 30 - - v v gs =0, i d =250 a v gs(th) 1.0 1.5 2.5 v v ds = v gs , i d =250 a g fs *1 - 12 - s v ds =5v, i d =10a i gss - - 100 na v gs = 20 - - 1 v ds =24v, v gs =0 i dss - - 25 a v ds =20v, v gs =0, tj=125 c - 6.8 9 m v gs =10v, i d =12a r ds(on) *1 - 13.1 18 m v gs =4.5v, i d =8a dynamic ciss - 1638 - coss - 176 - crss - 141 - pf v ds =15v, v gs =0v, f=1mhz
cystech electronics corp. spec. no. : c709v8 issued date : 2012.08.20 revised date : 2012.08.23 page no. : 3/9 MTB09N03V8 cystek product specification characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions qg (v gs =10v) *1, 2 - 17 - qg (v gs =4.5v) *1, 2 - 11.8 - qgs *1, 2 - 4 - qgd *1, 2 - 6.3 - nc v ds =15v, v gs =10v, i d =13a t d(on) *1, 2 - 17 - tr *1, 2 - 61 - t d(off) *1, 2 - 87 - t f *1, 2 - 30 - ns v ds =15v, i d =1a, v gs =10v, r gs =6 rg - 1.5 - v gs =15mv, v ds =0v, f=1mhz source-drain diode i s *1 - - 4 i sm *3 - - 16 a v sd *1 - 0.76 1.2 v i f =i s , v gs =0v trr - 20 - ns qrr - 12 - nc i f =i s , di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. recommended soldering footprint unit : mm
cystech electronics corp. spec. no. : c709v8 issued date : 2012.08.20 revised date : 2012.08.23 page no. : 4/9 MTB09N03V8 cystek product specification typical characteristics typical output characteristics 0 20 40 60 80 100 120 0246810 v ds , drain-source voltage(v) i d , drain current(a) 10v, 9v, 8v, 7v, 6v v gs =3v v gs =4v v gs =2 v 5v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -60 -20 20 60 100 140 180 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 1 10 100 1000 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =10v v gs =2.5v v gs =3v v gs =4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 04812162 i dr , reverse drain current(a) v sd , source-drain voltage(v) 0 tj=25c tj=150c static drain-source on-state resistance vs gate-source voltage 0 10 20 30 40 50 60 70 80 90 100 024681 0 drain-source on-state resistance vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -60 -40 -20 0 20 40 60 80 100 120 140 160 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =12a r ds( on) @tj=25c : 6.8 m v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =12a
cystech electronics corp. spec. no. : c709v8 issued date : 2012.08.20 revised date : 2012.08.23 page no. : 5/9 MTB09N03V8 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 10000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss f=1mhz threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -60 -20 20 60 100 140 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) v ds =10v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 04812162 qg, total gate charge(nc) v gs , gate-source voltage(v) 0 v ds =15v i d =13a maximum safe operating area 0.01 0.1 1 10 100 1000 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) dc 10ms 100ms 1ms 100 s r ds( on) limit t c =25c, tj=150c v gs =10v,r ja =50c/w single pulse 1s maximum drain current vs case temperature 0 5 10 15 20 25 30 35 40 45 25 50 75 100 125 150 175 t c , case temperature(c) i d , maximum drain current(a) v gs =10v, r jc =6c/w
cystech electronics corp. spec. no. : c709v8 issued date : 2012.08.20 revised date : 2012.08.23 page no. : 6/9 MTB09N03V8 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 20 40 60 80 100 120 024681012 v gs , gate-source voltage(v) i d , drain current (a) v ds =10v single pulse maximum power dissipation 0 50 100 150 200 250 300 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width(s) peak transient power (w) t j(max) =150c t a =25c ja =50c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =50 c/w
cystech electronics corp. spec. no. : c709v8 issued date : 2012.08.20 revised date : 2012.08.23 page no. : 7/9 MTB09N03V8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c709v8 issued date : 2012.08.20 revised date : 2012.08.23 page no. : 8/9 MTB09N03V8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
spec. no. : c709v8 issued date : 2012.08.20 revised date : 2012.08.23 page no. : 9/9 cystech electronics corp. MTB09N03V8 cystek product specification dfn3 3 dimension marking: date code s s s g d d d d b09 n03 8-lead dfn3 3 plastic package cystek package code: v8 *: typical inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.0276 0.0354 0.70 0.90 e 0.1181 0.1260 3.00 3.20 a1 0.0000 0.0197 0.00 0.50 e1 0.0531 0.0610 1.35 1.55 b 0.0094 0.0138 0.24 0.35 e 0.0256 bsc 0.65 bsc c 0.0039 0.0079 0.10 0.20 h 0.1260 0.1339 3.20 3.40 d 0.1280 0.1339 3.25 3.40 l 0.0118 0.0197 0.30 0.50 d1 0.1201 0.1280 3.05 3.25 l1 0.0039 0.0079 0.10 0.20 d2 0.0945 0.1024 2.40 2.60 l2 0.0445 ref 1.13 ref notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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